1. Field of the Invention
The present invention relates to a CMOS bias circuit including a start circuit.
2. Background Art
In the conventional DC-DC converter such as a switching regulator, a configuration which monitors the output voltage, generates an amplified error signal by amplifying a difference between the output voltage and a desired target voltage in an error amplifier, and exercises feedback control on the output voltage in accordance with the amplified error signal.
Since a delay is generated by an inductor and a capacitor in such a DC-DC converter, it is difficult to bring its control band into high frequencies when it is seen as a power supply.
Response characteristics obtained when an abrupt load variation has occurred depend on the control band. For reducing the output voltage variation, therefore, it is necessary to bring the control band into high frequencies.
Some conventional DC-DC converter operates so as to bring the output voltage close to the target voltage, and brings the temporal change rate of the output voltage close to zero provided that the output voltage is within a voltage range containing the target voltage (see, for example, JP-A-2005-45942 (KOKAI)).